Real 8D Report Examples

This page collects real 8D report examples from automotive, electronics, and manufacturing industries. Each example demonstrates the complete D0-D8 structure with genuine root cause analysis.

Example 1: PCB Solder Crack (Electronics Manufacturing)

**D0 — Emergency Response:** 1,200 units of Lot#A382 quarantined at warehouse. Customer notified within 2 hours.

**D1 — Team:** J. Zhang (QE Lead), M. Chen (Design), R. Patel (Process), S. Kumar (Supplier Quality)

D2 — Problem Description (5W2H):

**What:** 0.3mm radial crack at P3 solder joint causing intermittent open circuit

**Where:** Detected at customer final test, located on PCB FET switching area

**When:** Lot#A382, Night Shift 2026-03-15, detected 2026-03-28

**How Many:** 8/200 boards (4% failure rate, 40,000 PPM)

**How Detected:** Customer accelerated life test — thermal cycling failure

D3 — Containment:

100% X-ray inspection of all Lot#A382 units (1,200 units)

Additional 200% inspection for next 3 production lots

Clean point: Serial#A382-1201 (first unit after corrective action)

D4 — Root Cause (5-Why):

1. Why solder crack? → Void >25% in FET drain pad solder joint

2. Why >25% void? → Reflow profile temperature ramp too fast

3. Why too fast? → Oven zone 3 thermocouple reading 15°C low

4. Why reading low? → Thermocouple not replaced at 6-month interval

5. Why not replaced? → PM schedule didn't include reflow oven thermocouples

**TRC:** Solder void >25% due to incorrect reflow temperature

**MRC:** PM schedule excluded reflow oven critical sensors

**Escape Point:** AOI specification allowed 30% void (exceeding design requirement of 15%)

**D5 — PCA Verification:** New reflow profile validated with X-ray on 500 boards — 0% voids >15%

**D6 — Implementation:** PM schedule updated, AOI void threshold lowered to 15%

**D7 — Prevention:** FMEA updated, all reflow ovens audited across 3 production lines

Example 2: Motor Controller Thermal Runaway (Automotive)

**D2 — Problem:** Thermal runaway at 85% load after 200h continuous operation. 4% failure rate.

**D4 — Root Cause:** FET gate driver IC latch-up at elevated temperature (85°C) due to insufficient dead-time in PWM control → 5-Why traced to IC datasheet errata not reviewed during design review → MRC: design review checklist missing component errata verification step.

What Makes a Good 8D Report

1. **Specific problem description** — Data and measurements, not adjectives

2. **Evidence-based root cause** — 5-Why verified with data at every link

3. **TRC and MRC both identified** — Technical AND management root causes

4. **Verified corrective actions** — Capability studies, pilot runs, data

5. **Systemic prevention** — FMEA updates, horizontal deployment, standards changes

Common 8D Report Pitfalls

"Operator error" as root cause (dig deeper — why did the operator err?)

No containment evidence (inventory counts, inspection records)

Corrective action = "retrained operator" (not a permanent fix)

Missing escape point (where else could this happen?)

Key Takeaways

1. Real 8D examples show the complete D0-D8 structure

2. Every D4 must separate TRC from MRC

3. Data beats opinions — verify every 5-Why link

4. D7 must update FMEA and deploy horizontally

5. A good 8D is a communication tool, not just paperwork